Digital Logic Design

Fall 2005

Text: Digital Design by Mano (3^rd Edition). The CD-ROM in the back of the book contains a Verilog simulator as well as source code files for all the examples in the book.

Goals

Primary goals of the course are:

To introduce digital logic design.

Specific topics include: Binary systems, Boolean algebra, logic gates, analysis/design of combinatorial circuits, synchronous sequential logic, (If we had enough time we will look at registers, counters, and memory briefly)..

To introduce laboratory experiments in digital circuits and logic design; students will construct and test basic digital circuits using standard integrated circuits (ICs).

Exams

There will be 1 exam during the semester and a final exam at the end of the semester.

All exams will be open book and open notes.

Homework

Assignments are due seven days from the initial day of the assignment (i.e. the following Sunday).

Late homework will be docked 50% per class period late, unless approved arrangements are made in advance.

All coursework must be clear, legible, and have the name, course, and assignment number in the upper right hand corner of the page.

Cooperative group study on the homework is encouraged, but simply copying someone else's work is unethical and will leave you unprepared for exams.

Grading Policy:

Final grades in the course will be based on the following weighting distribution.

Homework……25%

Midterm 1…… 30%

Final Exam…..50%

Students are responsible for their own learning, through reading and studying the text, reviewing the lectures, and working out the homework problems. I strongly advise that you read the upcoming material before it appears in lecture; the material will make much more sense that way.

Topics	Chapter	Lecture Note
Introduction: Binary Systems	1	lecture-1
Boolean Algebra and Logic Gates	2	lecture-2
Boolean Algebra and Logic Gates: Gate-Level Minimization	2, 3	lecture-3
Gate-Level Minimization	3	lecture-4
Homework 1	1,2,3	hw1
Gate-Level Minimization, Combinational Logic	3, 4	lecture-5
Combinational Logic	4, 1-3	lecture-6a
Homework 2 (part a)	4	hw2
Combinational Logic	4	Lecture-7
Midterm	1- 4	midterm
Synchronous Sequential Logic	5	Lecture-8
Synchronous Sequential Logic	5	Lecture-9
Synchronous Sequential Logic	5	Lecture-10
Homework 3	5	hw3
Registers	6	Lecture-11
Homework 4	5	hw4
Counter	7	Lecture-12
Memory and Programmable Logic	7	Lecture-13
Homework 5	7	hw5
Final Exam		Final